Egr 2400 Exam 1 With Questions And Answers

1's Complement {Ans: MSB = 0: the number is positive the remaining n-1 bits represent the magnitude MSB = 1: the number is negative the remaining n-1 bits do not represent the magnitude to change the sign- invert all the bits}D Flip Flop {Ans: 1) when clear is true (high), q = 0 - the clear is asynchronous 2) when clock is on rising edge, q changes to be the same D - if the clear is false (low) q retains its value until the rising edge of the clock}what is a two-bit equality detector? {Ans: -has a 4-bit input true when a(0) = b(0) AND a(1) = b(1) -made up of 2 XNOR gates and 1 AND gate ∼(a(1) ^ b(1)) & ∼(a(0) ^ b(0))}what kind of FPGA is on the BASYS 2? (this is what we use in lab) {Ans: Spartan 3 (another common one is the Spartan-3E)}2's complement encoding scheme if negative {Ans: 1) add leading zero 2) invert all bits of the positive 2's complement 3) add 1 **the extra leading one just means the number is negative}how do you know if a hexadecimal number is positive/negative? {Ans: for MSB